Switching pattern transition algorithm for a three-level converter using pulse-width modulation for selective harmonic elimination

The paper proposes a switching pattern transition algorithm for a three-level converter using pulse-width modulation for selective harmonic elimination. The algorithm enables the user to select the required switching pattern depending on the output voltage frequency of the converter. The paper solves the problem of enabling a transition between switching patterns while limited to a single switching of the semiconductor converter modules. It details the flowchart of the algorithm. The paper further presents the simulation results that prove the algorithm functional and show the generation of variable-frequency voltage by the three-level converter coupled with transition between switching patterns without any current inrush or fluctuations during such transitions. The implemented algorithm can be easily adapted to the transition problems associated with other pulse-width modulation methods.