FPGA functional complete tolerant logic elements for aerospace computer systems

Functional and complete (in the sense of Theorem Post) tolerant elements have been proposed as a paradigm spread structurally stable computers, proposed by Professor V. A. Kharitonov, at the turn of the 90s of the twentieth century, on the register transfer level. Structurally stable computers have the ability to emulate the desired command system in case of failure of individual teams from the original set. In turn, functionally complete tolerant logic elements FCTLE have the ability of maintaining the functional completeness of a given model of failures. In 1996-1997 FСT were obtained function model considering the constant failure of one of the four inputs of the corresponding element (stuck-at-0; stuck-at-1). They were the composition of AND, OR, NOT logic functions. Of these, the practical significance of known functions 2OR-2AND-NOT; 2AND-2OR-NOT. When adding Bridging Faults: (Dominant; Wired AND, OR; Dominant AND / OR), it proved that the cardinality of the set of functions FPT reduced, but 2OR-2AND-NOT; 2AND-2OR-NOT maintain tolerance. Then there were the issues of maintaining the functional completeness at the transistor level - for internal failures logic element (valve) - KMOS transistors (stuck-closed transistor - permanently closed, stuck-open transistor - permanently open. It is shown that the functional completeness is preserved in case of failure of one transistor or a top of the circuit - connect “+” power supply or lower - bus connection “Ground”. Then there is understanding that can be similar to conserve not only the functional completeness, but also the realization of a function at the level of a single element. The article features FCTLE elements included in the FPGA with the so-called LUT (Look Up Table).