Insufficient memory bandwidth on Stencil code: the advantage of a vector dataflow processor

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The main factor limiting performance for the most part of highperformance computing applications is insufficient memory bandwidth, not computational power. Software methods for overcoming this drawback are block methods localizing memory accesses within fast on-chip memory, and ``software pipelining'' for organizing calculations in the form of chains of arithmetic commands between memory accesses. Software pipelining was applied to the 2D and 3D Stencil programs in vector dataflow processor. Achieved performance was significantly higher than it is possible to get for the best traditional processors. (In Russian). (in Russian).

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Dataflow architecture, performance evaluation, shared-memory multiprocessor, vector processor

Короткий адрес: https://sciup.org/143166181

IDR: 143166181

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