Evaluation of the impact of the number of thermometric bits in an R-2R DAC

The article examines the impact of architectural decisions on the linearity and area of digital-to-analog converters (DACs) based on a resistive R-2R ladder. The relevance of the study is driven by the growing demand for compact and high-precision DACs in modern analog-to-digital systems. The aim of the work is to analyze segmented DACs that combine thermometric and binary-weighted architectures in terms of differential (DNL) and integral (INL) nonlinearity, as well as occupied area. The research method involves simulating various DAC architectures using the domestic CMOS technology of the Mikron plant. It is shown that increasing the share of thermometric bits improves linearity due to inherent monotonicity but significantly increases the number of required resistors and switches, leading to larger area and higher circuit complexity. Based on the obtained data, recommendations are provided for selecting the optimal architectural solution depending on the requirements of a specific application.