A Robust Fault Detection Scheme for the Advanced Encryption Standard
Автор: Hassen Mestiri, Noura Benhadjyoussef, Mohsen Machhout, Rached Tourki
Журнал: International Journal of Computer Network and Information Security(IJCNIS) @ijcnis
Статья в выпуске: 6 vol.5, 2013 года.
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Fault attacks are powerful and efficient cryptanalysis techniques to find the secret key of the Advanced Encryption Standard (AES) algorithm. These attacks are based on injecting faults into the structure of the AES to obtain the confidential information. To protect the AES implementation against these attacks, a number of countermeasures have been proposed. In this paper, we propose a fault detection scheme for the Advanced Encryption Standard. We present its details implementation in each transformation of the AES. The simulation results show that the fault coverage achieves 99.999% for the proposed scheme. Moreover, the proposed fault detection scheme has been implemented on Xilinx Virtex-5 FPGA. Its area overhead and frequency degradation have been compared and it is shown that the proposed scheme achieves a good performance in terms of area and frequency.
Security, Fault Attacks, Fault Detection Scheme, Countermeasure, Advanced Encryption Standard (AES)
Короткий адрес: https://sciup.org/15011201
IDR: 15011201
Список литературы A Robust Fault Detection Scheme for the Advanced Encryption Standard
- National Institute of Standards and Technology (NIST), "Advanced Encryption Standard (AES)," FIPS Publication 197, http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf, 2001.
- H. Mestiri, M. Machhout, R. Tourki, "Performances of the AES design in 0.18µm CMOS technology," IEEE, 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2012.
- L. Lan, "The AES encryption and decryption realization based on FPGA," Seventh International Conference on Computational Intelligence and Security (CIS 2011), pp. 603-607, 2011.
- A. Moh'd, Y. Jararweh and L. Tawalbeh, "AES-512: 512-bit Advanced Encryption Standard algorithm design and evaluation," 7th International Conference on Information Assurance and Security (IAS 2011), pp. 292-297, 2011.
- C. Qingfu, L. Shuguo, "A high-throughput cost-effective ASIC implementation of the AES algorithm," 8th International Conference on ASIC (ASICON 2009), pp. 805-808, 2009.
- H. Mestiri, N. Benhadjyoussef, M. Machhout and R. Tourki, "A Comparative Study of Power Consumption Models for CPA Attack," International Journal of Computer Network and Information Security, Vol. 5, No. 3, pp. 25-31, 2013.
- C. Giraud, "DFA on AES," In H. Dobbertin, V. Rijmen, A. Sowa (Eds.): AES 2004, Lecture Notes in Computer Science, Vol. 3373, pp. 27–41, 2005.
- G.Piret and, J.J. Quisquater, "A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad," In Cryptographic Hardware and Embedded Systmes - CHES 2003, Lecture Notes in Computer Science Vol. 2779, pp.77-88, 2003.
- P. Dusart, G. Letourneux, and O. Vivolo, "Differential Fault Analysis on A.E.S," ACNS 2003, Lecture Notes in Computer Science Vol. 2846, pp. 293–306, 2003.
- A. Moradi, M.T. Manzuri Shalmani, and M. Salmasizadeh, "A Generalized Method of Differential FaultAttack Against AES Cryptosystem," CHES 2006, Lecture Notes in Computer Science Vol. 4249, pp. 91–100, 2006.
- J. Takahashi, T. Fukunaga, K. Yamakoshi, "DFA Mechanism on the AES Key Schedule" In IEEE computer society, editor, Workshop on Fault Diagnosis and Tolerance in Cryptography, pp. 62 – 74, FDTC 2007.
- M. Tunstall, D. Mukhopadhyay, and S. Ali, "Differential Fault Analysis of the Advanced Encryption Standard using a Single Fault," Available from: http://eprint.iacr.org/2009/575.pdf, 2009.
- D. Boneh, R.A. DeMillo, R.J. Lipton, "On the importance of checking cryptographic protocols for faults," EUROCRYPT 1997, Lecture Notes in Computer Science, vol. 1233, pp. 37-51, 1997.
- R. Karri, K. Wu, P. Mishra, and Y. Kim, "Concurrent Error Detection Schemes of Fault Based Side-Channel Cryptanalysis of Symmetric Block Ciphers," IEEE Transactions on Computer-Aided Design, Vol 21, N°12, Dec 2002.
- C. Yen, and B. Wu, "Simple error detection methods for hardware implementation of Advanced Encryption Standard," IEEE Transactions on Computers, Vol. 55, N°. 6, June 2006.
- G.D. Natale, M.L. Flottes, B. Rouzeyre, "On-Line Self-Test of AES Hardware Implementations," DSN'07, Workshop on Dependable and Secure Nanocomputing, Edinburgh, Royaume-Uni, 2007.
- J. Rajendran, H. Borad, S. Mantravadi, R. Karri, "SLICED: Slide-based concurrent error detection technique for symmetric block ciphers,"IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 70-75, 2010.
- J. Chu, M. Benaissa, "Error Detecting AES using Polynomial Residue Number Systems," Microprocessors and Microsystems, Elsevier, 2012.
- M. Joye, P. Manet, and J.B. Rigaud, , "Strengthening hardware AES implementations against fault attacks," IET Information Security, pp. 106-110, Sept, 2007.
- M. Mozaffari-Kermani, and A. Reyhani-Masoleh, "Concurrent structure-independent fault detection schemes for the advanced encryption standard," IEEE Transactions on Computers, Vol. 59, pp. 608-622, 2010.
- R. Karri, K. Wu, P. Mishra, and K. Yongkook, "Fault-Based Side Channel Cryptanalysis Tolerant Rijndael Symmetric Block Cipher Architecture," Proceedings. IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp.427-435, 2001.
- X. Guo, D. Mukhopadhyay, and R. Karri, "Provably Secure Concurrent Error Detection Against Differential Fault Analysis," IACR Cryptology ePrint Archive, Available from:eprint.iacr.org/2012/552.pdf, 2012.
