An optimized approach towards reversible adder/subtractor design on QCA
Автор: Snigdha Singh, Abhinay Choudhary, Manoj Kumar Jain
Журнал: International Journal of Modern Education and Computer Science @ijmecs
Статья в выпуске: 10 vol.11, 2019 года.
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In the present era of miniaturization, higher power dissipation in form of heat has become a very critical issue for the digital Circuits. This excessive heat may result in the lower chip reliability and even destroy it. Due to this reason a substitute is required for the traditional CMOS technology, Reversible logic is a paradigm in this direction. This paper encompasses of the newly proposed SA reversible logic and basic combinational implementations using a single SA building block only resulting in lower circuit level complexity as well as hardware requirement. The output responses and energy dissipation of proposed SA reversible logic are verified and calculated with the help of QCADesigner and QCADesigner-E simulation tools respectively.
Quantum cost, garbage output, constant input, reversible logic, low power CMOS Technology
Короткий адрес: https://sciup.org/15016887
IDR: 15016887 | DOI: 10.5815/ijmecs.2019.10.06
Список литературы An optimized approach towards reversible adder/subtractor design on QCA
- Snigdha Singh, Abhinay Choudhary, Manoj Kumar Jain, "A Brief Overview of Reversible Logic gate and Reversible Circuits," International journal of Electronics Engineering, volume 11,Issue 2 June - Dec 2019 pp.. 86-104.
- Gordon E. Moore," Cramming more components onto integrated circuits,"Electronics, volume 38, number8, April 19, 1965.
- R. Landauer, "Irreversibility and Heat Generation in the Computing Process," in IBM Journal of Research and Development, vol. 5, no. 3, pp. 183-191, July 1961.
- W. Keyes & R. Landauer,“Minimum Energy Dissipation in Logic,” IBM Journal of Research and Development. 14. 152-157. 1970.
- C. H. Bennett," Logical Reversibility of Computation," IBM Journal of Research and Development, vol. 17, no. 6, pp. 525-532, Nov. 1973.
- Robert Wille, Rolf Drechsler, "Towards a Design Flow for Reversible Logic," Springer book.
- Massimo Macucci,"Quantum Cellular Automata (QCA) Theory, Experimentation and Prospects,"Copyright © 2006 by Imperial College Press ISBN 1-86094-632-1Printed in Singapore by World Scientific Printers (S) Pie Ltd.
- V. Vedral, A. Bareno and A. Ekert, “Quantum networks for elementary arithmetic operations”, Physical Review A, vol. 54, no. 1, (1996), p. 147
- Md. Abdullah-Al-Shafi, Riasaad Haque Aneek , Ali Newaz Bahar," Universal Reversible Gate in Quantum-Dot Cellular Automata (QCA): A Multilayer Design Paradigm," International Journal of Grid and Distributed
- K. Walus, T. J. Dysart, G. A. Jullien and R. A. Budiman, “QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata”, IEEE transactions on Nanotechnology, vol. 3, no. 1, (2004), pp. 26-31.
- F. Sill Torres, R. Wille, P. Niemann and R. Drechsler, "An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 12, pp. 3031-3041, Dec. 2018.
- Manual for QCADesigner-Energy (QD-E) Manual version: 1.0(https://github.com/FSillT/QCADesigner-E)
- Rangaraju H G , Venugopal U , Muralidhara K N , Raja K B ," Low Power Reversible Parallel Binary Adder/Subtractor," International Journal of VLSI Design & Communication Systems, 1.3(2010),pp-23-34.
- W. D. Pan and M. Nalasani, "Reversible logic," IEEE Potentials, vol. 24, no. 1, pp. 38-41, Feb.-March 2005.
- B.Raghukanth, B.Murali Krishna , M. Sridhar and V.G. SanthiSwaroop"a distinguish between reversible and conventional logic gates,"Journal of Engineering Research and Applications (IJERA) Vol. 2, Issue 2,Mar-Apr 2012, pp.148-151.
- S. S. Chiwande and P. K. Dakhole, "VLSI design of power efficient Carry Skip Adder using TSG & Fredkin reversible gate," 2012 International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, 2012, pp. 370-373.
- M. Surekha," Efficient Approaches for Designing Quantum Costs of Various Reversible Gates," International Journal of Engineering Studies. ISSN 0975-6469 Volume 9, Number 1 (2017), pp. 57-78.
- Neeraj KumarMisra, Mukesh Kumar Kushwaha, SubodhWairya&Amit Kumar (2015), "Cost Efficient Design of Reversible Adder Circuits for Low Power Applications,” International Journal of Computer Applications. 117. 37-45. 10.5120/20665-3408.
- Jadav Chandra DAS and Debashis DE," Reversible binary subtractor design using quantum dot-cellular automata” Frontiers of Information Technology & Electronic Engineering www.jzus.zju.edu.cn; engineering.cae.cn; www.springerlink.com ISSN 2095-9184 (print); ISSN 2095-9230 (online). 2017 18(9):1416-1429
- Himanshu Thapliyal and Nagarajan Ranganathan," Design of Efficient Reversible Binary SubtractorsBased on A New Reversible Gate,” 978-0-7695-3684-2/09 $25.00 © 2009 IEEEDOI 10.1109/ISVLSI.2009.49.
- Anamika and R. Bhardwaj,"Reversible logic gates and its performances,"2018 2nd International Conference on Inventive Systems and Control (ICISC),Coimbatore, 2018,pp. 226-231.
- P.Vanusha , k.AmurthaVally," Low Power Computing Logic Gates design using Reversible logic," International Journal of Application or Innovation in Engineering & Management (IJAIEM) Volume 3, Issue 10, October 2014..
- S. R. S. Kalavakolanu," Implementation of Reversible Logic at Gate Level," 2018 2nd International Conference on Inventive Systems and Control (ICISC), Coimbatore, 2018pp.959-963.
- M. S. Islam, M. M. Rahman, Z. Begum and M. Z. Hafiz, "Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders," 2009 International Conference on Advances in Computational Tools for Engineering Applications, ZoukMosbeh, 2009, pp. 396-401.
- H. M. H. Babu, M. R. Islam, S. M. A. Chowdhury and A. R. Chowdhury, "Synthesis of full-adder circuit using reversible logic," 17th International Conference on VLSI Design. Proceedings., Mumbai, India, 2004, pp. 757-760.
- J. W. Bruce, M. A. Thornton, L. Shivakumaraiah, P. S. Kokate and X. Li, "Efficient adder circuits based on a conservative reversible logic gate," Proceedings IEEE Computer Society Annual Symposium on VLSI. New.
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