Comparison based Analysis of Different FFT Architectures
Автор: Priyanka S. Pariyal, Dhara M. Koyani, Daizy M. Gandhi, Sunil F. Yadav, Dharam J. Shah, Ankit Adesara
Журнал: International Journal of Image, Graphics and Signal Processing(IJIGSP) @ijigsp
Статья в выпуске: 6 vol.8, 2016 года.
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A time-domain sequence is converted into an equivalent frequency-domain sequence using discrete Fourier transform. The reverse operation converts a frequency-domain sequence into an equivalent time-domain sequence using inverse discrete Fourier transform. Based on the discrete Fourier transform. Fast Fourier transform (FFT) is an effective algorithm with few computations. FFT is used in everything from broadband to 3G and Digital TV to radio LAN's. To improve its architecture different efficient algorithms are developed. This paper gives an overview of the work done by a different FFT processor previously. The comparison of different architecture is also discussed.
FFT(Fast Fourier Transform), FFT algorithms, area efficient FFT, Speed efficient FFT
Короткий адрес: https://sciup.org/15013986
IDR: 15013986
Список литературы Comparison based Analysis of Different FFT Architectures
- Daniel N. Rockmore_" The FFT - an algorithm the whole family can use", Departments of Mathematics and Computer Science ,Dartmouth College , October 11, 1999
- DSP Applications Using C and the TMS320C6x DSK. RulphChassaing © 2002 John Wiley & Sons, Inc.
- CliveTemperton ," A GENERALIZED PRIME FACTOR FFT ALGORITHM FORANY N = 2'3'5" *" , SIAM J. ScI. STAT. COMPUT. ,Vol. 13, No. 3, pp. 676-686, May 1992(C) 1992 Society for Industrial and Applied Mathematics003.
- Muhammad FirmansyahKasim, Trio Adiono, Muhammad Fahreza, Muhammad FadhliZakiy, "FPGA Implementation of Fast Serial 64-Points FFT/IFFT Block without Reordering Block", Bandung, Indonesia
- N. Mahdavi, R. Teymourzadeh, IEEE Student Member, Masuri Bin Othman , "VLSI Implementation of High Speed and High Resolution FFT Algorithm Based on Radix 2 for DSP Application",The 5th Student Conference on Research and Development –SCOReD 200711-12 December 2007, Malaysia.
- Atin Mukherjee, AmitabhaSinha and DebeshChoudhury,"A Novel Architecture of Area Efficient FFT Algorithm for FPGA Implementation" , Neotia Institute of Technology, Management and Science.
- SnehaN.kherde,MeghanaHasamnis ,"Efficient Design and Implementation of FFT",International journal of Engineering Science and Technonlogy (IJEST), ISSN; Special Issue Feb 2011.
- Rajesh Mehra , Pooja Kataria ,National Institute of Technical Teachers, Training and Research, Chandigarh 160019, India "FPGA Based Area Efficient 64-Point FFT Using MAC Algorithm"
- S. W. Yu and E. E. Swartzlander, "A pipelined architecture for the multidimensional DFT," IEEE Trans. Signal Process., vol. 49 no. 9, pp.2096–2102, Sep. 2001.
- J. D. Bruguera and T. Lang, "Implementation of the FFT butterfly with redundant arithmetic," IEEE Trans. Circuits Syst. II, vol. 43, pp. 717–723, May 1996.
- Digital Signal Processing by John G. Proakis and Dimitris G.Monolakis
- Digital System Design using VHDL by Charles H.Roth ,Jr. Lizy kurian John
- International Journal of Emerging Trends in Signal Processing Volume 1 ,Issue 1, November 2012 "Comparative Study Of Various FFT Algorithm Implementation On FPGA" ,By Aniket Shukla and Mayuresh Deshmukh ,Mumbai University, B.E. Electronics ,Terna Engineering College, Nerul Navi Mumbai, India
- "FPGA Implementation of Low-Power Split-Radix FFT Processors", Zhuo Qian, Nasibeh Nasiri, Oren Segal, Martin Margala, University of Massachusetts Lowell, Lowell, MA,USA
