Method of carrying out the operative analysis of the electric and temporary parameters of digital CMOS cells and ICS on their basis

Method of operative calculation the electric and temporary parameters of digital schemes designed on the CMOS transistors basis is given in article. The considered method is based on replacement the functional-various logic elements (LE) by their macromodels. Macromodel («the equivalent inverter») is characterized by a fixed set of parameters which values are defined rather replaced LE. Input data at calculation are not physical properties of transistors on basis of which LE designed, but inverter delay in chain of cascade-connected inverters with identical topological parameters and capacitor parameters of transistors is designed. The offered method essentially simplifies the procedure of operative determination the parameters of digital CMOS schemes.