Converting the microprocessor software performance model to a hardware simulator based on field programmable logic arrays
Автор: Baida Yu. V., Butuzov A.V., Efimov A.G., Tsvetkov M.S.
Журнал: Труды Московского физико-технического института @trudy-mipt
Рубрика: Радиоэлектронные и оптоэлектронные системы
Статья в выпуске: 3 (15) т.4, 2012 года.
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The development of new microprocessor architecture requires making a lot of decisions based on performance modeling. FPGAs can provide a cost effective solution with up to 3 orders higher simulation speed than that of conventional software simulators. In this paper, we describe a novel methodology for converting the existing software cycle-accurate simulator to a FPGA-based hardware model.
Microprocessor, microarchitecture, simulator, simulation, performance, model, cycle-accurate, fpga
Короткий адрес: https://sciup.org/142185838
IDR: 142185838
