Monobit fast Fourier transform of radiofrequency signals in field programmable logic device (FPLD)

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A method for implementation of monobit fast Fourier transform algorithm in FPLD is proposed. Application of a signal graph with constant structure makes it possible to obtain a diagram of pipeline processing which is simple in its implementation.

Monobit fast fourier transform, signal graph, field programmable logic device

Короткий адрес: https://sciup.org/147154836

IDR: 147154836

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