Justification of the harmonics active filter circuit based on a hybrid cascade inverter

With an increase in the number of levels in the inverter, the circuit becomes more complicated, the number of semiconductor switches increases. Therefore, topologies, which make it possible to obtain an increase in voltage levels with a decrease in the number of semiconductors, to increase the performance and reliability of the system, are of great interest. The paper proposes a scheme of a hybrid cascade inverter, considers a method of pulse-width modulation based on a carrier, and presents a block diagram of an algorithm for generating reference modulating signals in an optimized method of pulse-width modulation. To control a hybrid inverter as part of an active harmonic filter, a method of pulse-width modulation of the carrier is proposed. It allows reducing the common-mode voltage, switching losses, and minimizing current and voltage harmonics. The paper describes the PWM algorithm, on the basis of which the control signals are modulated and then compared with a triangular carrier to generate a sequence of pulses that turn on or turn off semiconductor switches. The purpose of the proposed solutions is to improve harmonic distortion caused by non-linear load in a 0.4 kV low-voltage system. The results of modeling the proposed active harmonic filter circuit are presented. Based on the studies performed, it is shown that the use of an active harmonic filter based on a 5-stage hybrid inverter with pulse-width modulation control is an effective means of filtering higher harmonics on 0.4 kV low voltage buses in the presence of a nonlinear load, which allows solving the problem of eliminating the impact of higher harmonics on the production activities of the enterprise.