Processing-in-memory: текущие направления развития технологии

Processing-in-memory: текущие направления развития технологии

Автор: Снытникова Т.В.

Журнал: Проблемы информатики @problem-info

Рубрика: Прикладные информационные технологии

Статья в выпуске: 3 (60), 2023 года.

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Перемещение данных между центральным процессором и оперативной памятью является препятствием первого порядка на пути повышения производительности, масштабируемости и энергоэффективности современных систем. Компьютерные системы используют ряд методов для снижения накладных расходов, связанных с перемещением данных, начиная с традиционных механизмов и заканчивая новыми методами, такими как вычисления в памяти (Processingin-Memory, PIM). Эти методы можно разделить на два больших класса: вычисления рядом с памятью (processing-near-memory, PNM), когда вычисления выполняются в выделенных элементах обработки, и вычисление с использованием памяти (processing-using-memory, PUM), когда вычисления выполняются внутри массива памяти за счет использования внутренних аналоговых рабочих свойств запоминающего устройства. В работе рассматривается парадигма архитектур PIM и приводится обзор архитектур PUM, основанных на параллельных операциях DRAM и ассоциативных процессорах.

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Архитектуры вычислений в памяти, ассоциативные процессоры, pdram

Короткий адрес: https://sciup.org/143181005

IDR: 143181005   |   УДК: 004.272   |   DOI: 10.24412/2073-0667-2023-3-37-54

Processing-in-memory: current trends in the development of technology

Moving data between the CPU and RAM is a first-order obstacle to improved performance, scalability, and energy efficiency in today’s systems. Computer systems use a number of methods to reduce the overhead associated with data movement, ranging from traditional mechanisms to new methods such as Proccssing-in-Mcmory (PIM) computation. These methods can be divided into two large areas: processing-near-memory (PNM), where computations are performed in dedicated processing elements, and processing-using-memory (PUM), where computations are performed inside a memory array by exploiting the internal analog operating properties of the memory device. This paper discusses the paradigm of PIM architectures and provides an overview of PUM architectures based on parallel DRAM operations and associative processors.

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