Parallelization of NAS parallel benchmarks for Intel Xeon Phi coprocessor in Fortran-DVMH language
Автор: Aleksahin V.F., Bakhtin V.A., Zhukova O.F., Kolganov A.S., Krukov V.A., Ostrovskaya I.P., Podderugina N.V., Pritula M.N., Savitskaya O.A.
Рубрика: Информатика, вычислительная техника и управление
Статья в выпуске: 4 т.4, 2015 года.
Бесплатный доступ
The article analyzes the effectiveness of the implementation of NAS benchmarks from NPB 3.3.1 package (EP, MG, BT, SP, LU) on cluster nodes with different architectures using multi-core processors, NVidia graphics accelerators and Intel coprocessors. Characteristics of tests de-veloped in high-level Fortran-DVMH language (hereafter referred to as FDVMH), and their im-plementation in other languages are compared. We research the effect of different optimization methods for FDVMH NAS benchmarks necessary for their effective work on Intel Xeon Phi co-processor. The results of the simultaneous using of all cores of CPU, GPU and Intel Xeon Phi co-processor are presented.
Dvmh, тесты nas, high-level programming language, accelerator, coprocessor, gpu, nas parallel benchmarks, fortran
Короткий адрес: https://sciup.org/147160577
IDR: 147160577 | DOI: 10.14529/cmse150403
