Implementation of sharpening filter in residue number system on FPGA

This work presents an effective implementation of sharpen filter based on Laplace operator on the field programmable gate array (FPGA) by using residue number system (RNS). We demonstrated that using of approximate method for performing RNS complex operations gives much productivity gain. A special coefficient was used to implement real numbers, which provides a recovering process of positional characteristic to be correct. We researched coefficient ranging for filter implementation, and used set of modules {15,16,31}, that is sufficient for the hardware implementation of digital image processing. We applied FIFO structure with dimension 2N + 2M-3 to implement the filter for sharpening image with resolution MxN, and proved sufficiency of this number. By simulting with FPGA Xilinx Kintex 7 XC7K70T we have got a number of used slices and circuit maximum operating frequency for images with resolutions of 64×64, 128×128, 256×256, 375×375, 512×512.