Data recovery for the dual-channel self-timed circuit

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The article is devoted to the restoration of self-timed circuits on-line. In the self-timed circuits duplexed unit is prompted for information recovery. The unit is based on signal quadrupling circuit unlike triple redundancy schemes in synchronous digital. It describes the proposed CMOS transistor implementation of recovery. Duplication of these blocks allows unit and the use of failover Muller element

Self-timed (speed independent, переходный про­, cmos transistor, избыточ­, triple redundancy, пассивная отказоустойчи­, delay insensitive), circuits (circuits insensitive to delays in gates and wires), muller element, reliability, failure resistance, quadrupling

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Короткий адрес: https://sciup.org/14729997

IDR: 14729997

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