Simulation and optimization of the FPGA's novel logic elements and their features

Functional capabilities and applications of programmable logic devices are constantly expanding, including in special equipment. There are two main types of PLDs: FPGA (Field-Programmable Gate Array) and CPLD (Complex Programmable Logic Device), which differ in the principles of implementing logic and storing configuration information. Nevertheless, the differences between them are gradually leveled, so in Intel's FPGA products, having a configuration flash memory are categorized as CPLD, although the logic elements are typical for FPGAs that use RAM that requires power-up loads. Against this backdrop, attempts are made to integrate two approaches to implementing logic and creating hybrid FPGAs. In the article features of simulation and optimization of a set of new logic elements of FPGA for the implementation of systems of functions are analyzed.