Отказоустойчивая ячейка статической памяти с использованием функционально полных толерантных элементов

To raise the fault tolerance of the SRAM location elements with the excess basis - functionally complete tolerant elements which provide the location with operability in case of failure of the transistors in other words, are used. Modeling of SRAM location is described first. Then its modification using functionally complete tolerant elements is represented. The operability of the location in case of single constant failures is asserted. The comparison with the resilient implementation which is presented as a triplicating location with the output majority gate is carried out. This demonstrates that the SRAM location with functionally complete tolerant elements is more preferable in terms of the complexity factor, speed capability and the possibility of no-failure work.