Fault-tolerant SRAM on the basis of gate array cells
Автор: Tyurin S.F.
Журнал: Вестник Пермского университета. Серия: Математика. Механика. Информатика @vestnik-psu-mmi
Рубрика: Информатика. Информационные системы
Статья в выпуске: 1 (32), 2016 года.
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As an alternative, the authors have previously proposed transistor structures, parrying the refusal of some transistors, resulting from exposure to radiation and other negative factors. In the work it is proposed quadrupling SRAM cell - QSRAM cell. It is described the simulation of the QSRAM cell by NI Multisim system.
Ячейка памяти sram, sram с учетверением транзисторов - qsram, троирование - tmr (triple modular redundancy), ni multisim, cmos transistor, logic functions, gate array, redundancy, functional complete tolerant element, failure resistance, triple redundancy, quadrupling, redundant cell gate array, sram cell, dice sram cell, quadrupling sram cell, qsram cell, failure
Короткий адрес: https://sciup.org/14730022
IDR: 14730022
