Supervision Architecture Design for Programmer Logical Controller Including Crash Mode

Supervision Architecture Design for Programmer Logical Controller Including Crash Mode

Автор: Bennani fatima zohra, Sekhri Larbi, Haffaf Hafid

Журнал: International Journal of Information Technology and Computer Science(IJITCS) @ijitcs

Статья в выпуске: 11 Vol. 6, 2014 года.

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This paper is a contribution for development of a high level of security for the Programmer Logic Controller (PLC). Many industrial adopt the redundant PLC architecture (or Standby PLC) designed to replace the failed (out of order) PLC without stopping associated automated equipments. We propose a formal method to choose a Standby PLC based on probability study, by comparing normal functioning to misbehavior one leading to residue generation process. Any generated difference reveals a presence of anomaly. The proposed method begins by listing all PLC components failures leading to their stopping according to failures criticalities. Two models; functional and dysfunctional are obtained by using formal specifications. Probability’s calculus of dysfunction of each Standby PLC is obtained by the sum of the probabilities of dysfunction of its critical components. These probabilities are allocated each transition which leads to the dysfunction in the dysfunctional model. The dysfunctional model is obtained by using the FMECA method (Failure Modes, Effects and Criticality Analysis). We shall see that this global vision of functioning of the whole PLC leads to a higher level of security where the chosen Standby PLC works continuously.

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Programmer Logic Controller, Supervision, Petri Nets, UML, STEP7, PLCSim, Protool

Короткий адрес: https://sciup.org/15012186

IDR: 15012186

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