Design and implementation of control Unit-ALU of 32 bit asynchronous microprocessor based on FPGA
Автор: Archana Rani, Naresh Grover
Журнал: International Journal of Engineering and Manufacturing @ijem
Статья в выпуске: 3 vol.8, 2018 года.
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In today’s fast growing world, the digital design domain has two dominant role factors i.e. the efficiency and speed. The design of asynchronous processor is used to reduce the various challenges faced in synchronous architectures. There are numerous advantages of asynchronous processors, especially in SOC (System on the chip), reducing the crosstalk between analog and digital circuits, easiness in multi-rate circuit integration, reusability of ease of component and at last the less power consumption. The objective of this research paper is to design and simulate control unit of the asynchronous processor by using Xilinx ISE tool in VHDL. A robust control unit has been designed using FPGA. This control unit is responsible for accumulating the whole processor functioning control at a single unit. This paper further presents the optimization techniques for reducing area power and delay constraints related to digital circuits using FPGA.
FPGA, Digital circuits, design optimization
Короткий адрес: https://sciup.org/15015846
IDR: 15015846 | DOI: 10.5815/ijem.2018.03.02
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